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| INTEGRATED CIRCUITS 74LVT10 3.3V Triple 3-input NAND gate Product specification IC24 Data Handbook 1996 May 29 Philips Semiconductors Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An, Bn, Cn to Yn Input capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 3.3V TYPICAL UNIT LOGIC SYMBOL (IEEE/IEC) 1 2 & 12 tPLH tPHL 3.8 3.3 13 ns 3 4 6 CIN ICCL VI = 0V or 3.0V Outputs Low; VCC = 3.6V 2 1 pF mA 5 9 10 11 8 PIN CONFIGURATION A0 B0 A1 B1 C1 Y1 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC C0 Y0 SV00059 LOGIC DIAGRAM 1 A0 2 12 Y0 13 B0 C0 A1 B1 C1 3 4 5 9 10 11 8 Y2 6 Y1 C2 B2 A2 Y2 SA00346 PIN DESCRIPTION PIN NUMBER 1, 2, 3, 4, 5, 9, 10, 11, 13 6, 8, 12 7 14 A2 SYMBOL An, Bn, Cn Yn GND VCC NAME AND FUNCTION Data inputs Data outputs Ground (0V) Positive supply voltage VCC = Pin 14 GND = Pin 7 B2 C2 SA00348 FUNCTION TABLE INPUTS Dna L L Dnb L L H H L L H Dnc L H L H L H L H OUTPUTS Qn H H H H H H H L LOGIC SYMBOL 1 2 13 3 4 5 9 10 11 L L H H H A0 B0 C0 A1 B1 C1 A2 B2 C2 Y0 Y1 Y2 VCC = Pin 14 GND = Pin 7 12 6 8 H H NOTES: H = High voltage level L = Low voltage level SA00347 ORDERING INFORMATION PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP 14-Pin Plastic TSSOP TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVT10 D 74LVT10 DB 74LVT10 PW NORTH AMERICA 74LVT10 D 74LVT10 DB 74LVT10PW DH DWG NUMBER SOT108-1 SOT337-1 SOT402-1 1996 May 10 2 853-1832 16801 Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 Output in Off or High state Output in High state DC output current Output in Low state Storage temperature range 64 -65 to 150 C VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 -32 mA UNIT V mA V mA V DC output diode current DC output voltage3 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER MIN 2.7 0 2.0 0.8 -20 32 10 +85 MAX 3.6 5.5 V V V V mA mA ns/V C UNIT 1996 May 10 3 Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions Voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIK Input clamp voltage VCC = 2.7V; IIK = -18mA VCC = 2.7 to 3.6V; IOH = -100A VOH High-level output voltage VCC = 2.7V; IOH = -6mA VCC = 3.0V; IOH = -20mA VCC = 2.7V; IOL = 100A VOL Low-level output voltage VCC = 2.7V; IOL = 24mA VCC = 3.0V; IOL = 32mA II IOFF ICCH Quiescent supply current ICCL ICC CI Additional supply current per input pin2 Input capacitance Input leakage current Output off current VCC = 0 or 3.6V; VI = 5.5V VCC = 3.6V; VI = VCC or GND VCC = 0V; VI or VO = 0 to 4.5V VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND VI = 3V or 0 VCC-0.2 2.4 2.0 VCC 2.5 2.3 0.05 0.3 0.35 0.1 0.01 1 0.001 1 0.1 2 0.2 0.5 0.5 10 1 100 0.02 mA 2 0.2 mA pF A A V V TYP1 MAX -1.2 V UNIT NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specificed voltage level other than VCC or GND. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM MIN tPLH tPHL Propagation delay An, Bn, Cn to Yn 1 1.0 1.0 VCC = 3.3V 0.3V TYP1 3.8 3.3 MAX 5.2 4.4 VCC = 2.7V MAX 6.2 4.4 ns UNIT NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C. AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V Dna, Dnb, Dnc VM tPHL VM tPLH Qn VM VM SF00064 Waveform 1. Propagation Delay for Inverting Outputs 1996 May 10 4 Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 TEST CIRCUIT AND WAVEFORMS VCC 90% NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. CL RL POSITIVE PULSE VOUT VM 10% tTHL (tF) tTLH (tR) 90% VM tW 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V) Test Circuit for Outputs 10% VM = 1.5V Input Pulse Definition DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT 2.7V Rep. Rate 10MHz tW tR tF 500ns 2.5ns 2.5ns SV00022 1996 May 10 5 Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 1995 May 08 6 Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 1995 May 08 7 Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 1995 May 08 8 Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 NOTES 1995 May 08 9 Philips Semiconductors Product specification 3.3V Triple input NAND gate 74LVT10 DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. (c) Copyright Philips Electronics North America Corporation 1995 All rights reserved. Printed in U.S.A. (print code) Document order number: Date of release: July 1994 9397-750-04844 |
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